AMD's Billion Dollar Bet on Taiwan to Boost Advanced Packaging Capacity
On May 21st, local time, AMD announced it will invest over 10 billion USD in Taiwan's ecosystem to expand strategic partnerships and enhance advanced packaging capacity, providing support for the next generation of AI infrastructure.
This is AMD's largest single investment in the supply chain to date. The signal significance of this event is that, against the backdrop of exponentially increasing demand for AI computing power, advanced packaging is becoming the new battleground for chip giants.
EFB Packaging Technology: Targeting Higher Interconnect Bandwidth
AMD is working with Taiwan’s leading packaging and testing companies, ASE and SPIL, to develop the next-generation wafer-level 2.5D bridge interconnect technology (EFB). This architecture can significantly enhance interconnect bandwidth and reduce power consumption, and will first be applied to the sixth-generation EPYC server CPU codenamed "Venice" (Venice).
It is worth noting that AMD also completed the industry's first validation of 2.5D EFB interconnect technology based on a panel level in collaboration with PTI, which is seen as a key breakthrough in reducing costs for large-scale production of advanced packaging.
Helios Rack-level Platform: Entering "Multi-Gigawatt" Deployment in the Second Half of 2026
The AMD Helios platform integrates the Instinct MI450X GPU, sixth-generation EPYC CPU, advanced networking solutions, and the ROCm open-source software stack, positioning itself as a full-cabinet AI solution for large-scale data centers.
ODM manufacturers including Wiwynn, Wistron, Inventec, and Sanmina have joined the manufacturing camp of Helios, promoting the platform from design to mass production. According to AMD, Helios aims for "multi-gigawatt" deployment scale—a phrase directly targeting the GB200 NVL72 cabinet shipment pace previously disclosed by Nvidia.
Industry Chain Fully Geared Up
Looking at the list of announced partnerships, AMD has almost mobilized all the core resources in Taiwan's semiconductor packaging and substrate fields:
Packaging and Testing End: ASE and SPIL undertake the industrialization and implementation of EFB technology
Panel-level Packaging: PTI is responsible for panel-level EFB mass production verification
Substrate Supply: Unimicron, Nan Ya PCB, and Kinsu provide support for high-end substrates
System Integration: AIC participates in the mechanical architecture design of Helios cabinet-level
AMD's strategic intention for this move is very clear. In the face of Nvidia's establishment of high barriers with CoWoS advanced packaging capacity, AMD chooses to bet on the EFB route to forge a different path, attempting to build differentiated competitive advantages in packaging technology and the supply chain.
The scale of the 10 billion USD investment also shows that the competition for AI chips has extended from pure chip design to packaging, manufacturing, system integration, and the entire chain. For Taiwan's semiconductor supply chain, this is undoubtedly another significant positive impact.
Lisa Su stated in the announcement: "By combining AMD's leading advantages in high-performance computing with Taiwan's ecosystem and global strategic partners, we are building integrated rack-level AI infrastructure to help our customers accelerate the deployment of the next generation of AI systems."
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