CXMT's LPDDR6 R&D Validation Nearing Completion
N.R. Finch
CXMT's LPDDR6 R&D validation is nearing completion, putting commercialization past the halfway mark — the mainland Chinese DRAM maker is now within reach of a global first-mover window in next-generation mobile memory, targeting mass production in H2 2026.
R&D validation done — how many steps to mass production?
LPDDR products pass four gates before shipping: die-level validation → R&D validation → small-batch qualification → full mass production. CXMT is finishing gate two.
This means → core technical feasibility is largely proven. The remaining work is production-line tuning and customer qualification — closer to shipping than to research.
CXMT sent samples to key customers in March. Months of silence followed — analysts believe the quiet period was linked to IPO preparations — before fresh updates surfaced in August.
What do the specs actually look like?
CXMT's first LPDDR6 chip targets a design speed of 12,800 Mbps, with a base co-operating speed of 10,667 Mbps alongside a mobile SoC. Die capacity is 16 Gb; package capacity is 16 GB.
In plain terms = the speed matches the ceiling of the prior-generation LPDDR5X, but packaged under the new standard with meaningful gains in power efficiency and reliability.
The chip uses 1,295-ball POP packaging — stacking the memory die directly on top of the processor — with structural improvements in low-power design over LPDDR5X.
How fast is CXMT iterating?
Late 2023: LPDDR5 launched at 6,400 Mbps per die. 2025: LPDDR5X launched at up to 10,667 Mbps — a 66% speed gain and 30% power reduction over LPDDR5.
From LPDDR5 launch to LPDDR6 customer sampling, CXMT spanned two product generations in under three years. This reflects an iteration tempo closing in on global tier-one peers.
R&D spending is accelerating: RMB 9.59 billion in 2025, up 51.28% year-on-year. Cumulative R&D from 2023 to 2025 exceeds RMB 20.6 billion; cumulative patents stand at 6,972.
Who is using CXMT's chips — and where does Apple stand?
On the handset side, Xiaomi, Transsion, Honor, OPPO, and vivo are already in CXMT's LPDDR supply chain.
Apple has begun internal testing of CXMT's DRAM chips for products sold in the Chinese market, according to the Financial Times.
CEO Tim Cook said on the July 30 earnings call: "Apple is evaluating all options," adding that more DRAM suppliers "would bring benefits in supply and pricing." This means → Apple has not closed the door, but has not committed either — the stance is "competition welcome, qualification bar unchanged."
In the global LPDDR6 race, who leads?
SK hynix has the fastest disclosed timeline: it announced completion of the world's first 16 Gb LPDDR6 validation in March, with mass-production shipments planned for H2 2026.
Samsung and Micron are investing more conservatively in LPDDR6, redirecting substantial wafer capacity toward HBM (high-bandwidth memory) and server DRAM. This reflects how AI compute demand is reshaping memory giants' capacity priorities.
In plain terms = Samsung and Micron are focused on memory for AI servers, leaving the mobile-memory lane less crowded — and that is precisely the market window CXMT is targeting.
What do CXMT's market share and financials look like?
Global DRAM market share: Omdia puts it at 7.67%; Nomura estimates roughly 10% and projects it will reach 18% by end of 2028.
CXMT expects H1 2026 revenue of RMB 110–120 billion, up 612%–677% year-on-year, with net profit of RMB 50–57 billion, up 2,244%–2,544%.
This means → CXMT is at the inflection point between "catch-up player" and "player with pricing influence." Whether LPDDR6 ships on schedule — and whether it ships at or before the same time as SK hynix — is the key proof point for that leap.
Content is for reference only, not financial advice.