EMIB Packaged Substrates in Short Supply, Intel Asks Customers to Foot the Bill for Locking in Upstream Capacity

With the advancement of Intel's 18A and 14A advanced process nodes, its highly anticipated advanced packaging business — EMIB (Embedded Multi-die Interconnect Bridge) is gaining strong customer support against the backdrop of a global shortage of computing power.

At the recently held J.P. Morgan Global Technology Conference, Intel CEO Lip-Bu Tan revealed that due to the extremely structural tightness of ABF substrates and high-performance baseboards, four suppliers from Taiwan and two from Japan have clearly stated that "pre-commitment is required" to lock in production capacity.

Faced with this bottleneck, Intel has directly adopted a "crowdfunding from customers" aggressive business model. Lip-Bu Tan stated that Intel has asked top customers planning to use EMIB-T packaging to directly participate in the prepayment lock-in to upstream baseboard manufacturers, and the response from customers has been extremely positive.

Yield rate jumps to 90%: Google, Meta's self-developed chips to heavily invest from 2027 onwards

For a long time, TSMC's CoWoS packaging has monopolized the global top AI chip (such as NVIDIA Hopper/Blackwell architecture) foundry market. Although TSMC's CoWoS yield rate is already as high as 98%, its production capacity has been in a structurally extremely tight state since 2023, which has made industry giants eager to find alternatives.

According to the latest reconnaissance from industry authority TrendForce and analyst Jeff Pu:

1. Yield rate breakthrough: While NVIDIA is closely tied to TSMC, Intel's EMIB packaging yield rate has quietly soared to 90%, possessing the maturity for large-scale commercialization;

2. Securing major customers with orders: Tech giants are casting their votes with orders. Google's next-generation AI computing chip TPU v8e, scheduled for release in the second half of 2027, and Meta's self-developed heavyweight CPU, planned for release in the second half of 2028, have both clearly stated that they will adopt Intel's EMIB packaging.

TrendForce analysis points out that, thanks to Intel's expanding domestic manufacturing footprint in the United States, EMIB has made a differentiation architecture route completely different from TSMC's CoWoS.

Unlike CoWoS-S/L, which relies on expensive and limited "large interposers," EMIB cleverly utilizes embedded silicon bridges, thereby eliminating the reliance on large area interposers. This design not only increases the overall yield rate of the wafer, significantly reduces the risk of chip warping, but also notably enhances the long-term reliability of advanced servers.

In addition, in the pursuit of a larger wafer area reticle scale factor, EMIB shows an overwhelming physical advantage:

• TSMC CoWoS: The current scale factor of CoWoS-S is about 3.3 times, and CoWoS-L is about 3.5 times.

• Intel EMIB: Its EMIB-M architecture has reached 6 times and is expected to further expand to an impressive 8 to 12 times between 2026 and 2027, which means that Intel will be able to pack a supercomputing beast with a volume far exceeding TSMC's limit in a single package in the future.

Intel's publicly announced EMIB substrate partners include Ibiden from Japan, Shinko Electric from Taiwan, and AT&S from Austria. Among them, Shinko Electronics plans to expand its customer structure from CoWoS-related business to a broader field in the second half of 2026, with this new business expected to account for more than half of its total revenue.

Ibiden is expecting a sales increase of about 20% in fiscal year 2026, and has approved an additional investment of approximately 280 billion yen for expansion, as part of its combined 500 billion yen capital expenditure plan from fiscal years 2026 to 2028, with mass production set to start in stages in fiscal year 2027.