Foundry Capacity Utilization Nears 90%: No Price Cuts Expected Before 2027
nashnova research
Global foundry utilization has hit nearly 90%, with AI-driven demand spreading from leading-edge to mature nodes — giving fabs full pricing power and ruling out cuts before 2027.
What does 90% utilization actually mean?
Digitimes reports global foundry utilization is now approaching 90%.
This means → fabs are running near full capacity, with very little spare room. Customers must queue — and pay up — to secure wafer starts.
In plain terms = the factories are almost fully booked; jumping the line costs extra.
How has AI demand reshaped the entire pricing picture?
The surge in AI chip demand first squeezed leading-edge nodes — the production lines that build the latest high-performance chips.
That tightness has now spread to mature and specialty nodes, straining lines that produce automotive chips, power-management chips, and more.
This means → price increases are no longer limited to Nvidia's or AMD's suppliers — wafer costs are rising across the entire semiconductor supply chain.
How strong is TSMC and Samsung's bargaining position?
TSMC, Samsung, and other top-tier fabs sit on the favorable side of a tightening supply–demand cycle — capacity is scarce, and pricing power belongs to the seller.
This reflects a structural shift: the foundry business has moved from "customers choose fabs" to "fabs choose customers."
In plain terms = when a factory has no shortage of orders, the factory sets the price.
What does this mean for downstream companies and investors?
Chip-design houses and system OEMs face cost pressure extending beyond 2027, with little hope of near-term price concessions.
This means → downstream firms must either pass costs on to end consumers or accept margin compression — both will show up in earnings.
For investors, foundry stocks (TSMC and peers) carry high earnings visibility, while pure-play chip designers need watching for whether gross margins can absorb the price hikes.
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