Huawei Scientist Warns Nvidia's Chip Computing Power Expansion Will Hit Physical Limits
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Huawei semiconductor scientist Liao Heng (廖珩) warned that Nvidia's strategy of scaling compute by stacking transistors and high-bandwidth memory is approaching a physical ceiling — and proposed Huawei's alternative framework trading transmission efficiency for compute, with the first public test coming when teardown firms crack open a new chip later this year.
What is wrong with Nvidia's scaling path?
Liao said Nvidia's core approach — building ever-larger compute dies paired with more high-bandwidth memory — "inevitably has an upper limit."
This means → as chips grow larger and transistors pack tighter, thermal, power, and signal-transmission constraints all tighten at once; past a certain point, marginal gains collapse.
Liao chose the word "avalanche" — not a gradual slowdown, but a sudden performance cliff once the critical threshold is crossed.
What is the "Tau Scaling Law," and what path is Huawei proposing?
The industry mainstream scales performance by shrinking transistors. TSMC, Intel, and Samsung all follow this path, relying on ASML's EUV lithography tools — machines that etch chip circuits with extreme-ultraviolet light.
Blocked by U.S. sanctions from accessing EUV equipment, Huawei proposed the "Tau Scaling Law": stop chasing smaller transistors and instead optimize transmission speed between components inside the chip.
In plain terms = the mainstream approach keeps carving letters smaller to fit more on a page; Huawei's idea is to make the spacing and delivery channels more efficient, trading transmission speed for raw compute.
When will the "LogicFolding" chip face its first real test?
Huawei is about to release its first smartphone chip designed under the Tau framework, using a technique called LogicFolding.
Liao expects that later this year, once teardown firms such as SemiAnalysis and TechInsights analyze the chip, the outside world will get its first clear look at how Huawei's alternative actually performs.
This means → Huawei's alternative path is no longer just theory — the teardown report will be its first public exam.
How does Liao view the U.S.–China semiconductor "decoupling"?
Liao stated explicitly that rising geopolitical tensions are splitting the global semiconductor supply chain into two increasingly independent ecosystems.
"Even without a serious conflict, every side must build its own complete manufacturing and supply capability just to survive," he said.
This reflects a judgment inside Huawei that the question is no longer "will decoupling happen" but "decoupling is already underway — prepare accordingly."
Why does Huawei see its approach and DeepSeek's as "two sides of the same coin"?
Liao praised DeepSeek founder Liang Wenfeng (梁文锋): DeepSeek achieved breakthroughs under compute constraints through model-architecture innovation.
Huawei's chip-design logic runs parallel — trade higher design complexity for lower compute consumption, using "co-design" to make its AI chips better suited to efficiency-first models.
In plain terms = both operate under the same constraint — limited access to top-tier hardware — and both solve it with smarter design rather than brute-force stacking.
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