Morgan Stanley: AI Bottleneck Shifts from Computing Power to Storage
Taylor Wilson
Morgan Stanley's latest deep-dive argues that AI's core constraint is moving from GPU compute to memory bandwidth and capacity — memory's share of cloud capex is set to rise from 12% to 40%. The next AI infrastructure race will be fought on a different track.
Compute is surging — so why is AI still hitting a wall?
Processor performance keeps climbing, but memory cannot keep pace: DDR5 single-channel bandwidth grows only ~14% over two years, while global AI inference token generation is set to surge over 320× in the same period.
This means → the bottleneck is no longer "not enough compute" but "data can't be fed in or moved out fast enough" — capacity, bandwidth, and cost are all choking the pipeline.
In plain terms = the GPU is the engine; memory is the fuel line. No matter how powerful the engine, a narrow fuel line keeps the car slow.
Where does the money flow? How big is the market?
By 2030, Agentic AI — AI agents that execute tasks autonomously — could account for 26% to 77% of global incremental DRAM demand.
Cloud memory spending is projected to reach $418 billion, with an ~8% CAGR from 2026 to 2030; memory's share of cloud capex rises from 12% to 40%.
Excluding HBM (high-bandwidth memory), emerging memory technologies grow from $1.2 billion in 2025 to $23 billion by 2030; including HBM, the total market could hit $276 billion.
This means → the investment thesis is broadening from "buy GPUs" to "buy the entire memory ecosystem."
Six technology tracks — which ones matter most?
Advanced process nodes: DRAM has entered the 1γ node — the most advanced manufacturing generation — with Samsung, SK hynix, and Micron all ramping production. NAND is in the 200-to-300-layer era; roadmaps point to 1,000+ layers before 2030.
Advanced packaging: The HBM roadmap is advancing to HBM4/HBM4E; 16-layer HBM4E mass production around 2027 targets per-stack bandwidth of 1.5–2+ TB/s. Wafer-level stacking is projected to grow from $10 million in 2025 to $9.8 billion by 2030 — a 322% CAGR.
New memory architectures: PLC NAND, 3D DRAM, and high-bandwidth flash (HBF, from SanDisk, offering up to 4 TB of video memory capacity) are emerging, though full-scale 3D DRAM production still requires time.
Interconnects and processing-in-memory — why are they singled out?
Peripheral interconnect chips: MRDIMM can double effective bandwidth versus native DDR5 speeds. CXL — a protocol that extends memory via PCIe — saw sharp estimate upgrades: Morgan Stanley now forecasts the 2030 CXL MXC chip market at $2.1 billion (up from $990 million) and the CXL switch chip market at $1.9 billion (up from $664 million).
Processing-in-memory (PIM/CIM — moving computation directly inside the memory chip): Samsung's HBM-PIM and SK hynix's GDDR6-AiM are already commercial. Lab data shows average memory-access latency cut by over 50%, with performance gains up to 16× and energy efficiency up over 80% in select workloads.
This means → solving the memory wall is not just about building bigger memory sticks — it also requires data to travel less and travel faster.
What is Morgan Stanley's bottom line?
The report's one-line thesis: GPUs determine how fast AI runs; the memory system determines how far AI goes.
The next round of AI infrastructure competition hinges on who breaks through this systemic memory bottleneck first.
This reflects a broader shift: capex trends and technology milestones across the memory supply chain are becoming the new core variables for gauging AI's expansion potential — it is no longer just about who has the strongest GPU.
Content is for reference only, not financial advice.