Nomura: AI Cycle Has Not Peaked, Bottleneck Shifts from GPUs to Small Components
Alina Collins
Nomura judges the AI hardware cycle has not peaked, but the core tension has shifted from demand credibility to supply mismatch — from H2 2026 onward, substrates, capacitors, liquid cooling, and other small components will be the real capacity chokepoints.
How much longer can demand hold up?
Nomura's global data-center project tracker grew from roughly 240 to about 280 projects; GW-scale projects rose to around 50.
The 2027 deployment forecast was revised up from ~28 GW to 32.3 GW; 2028 visibility sits at roughly 22.85 GW.
This means → demand is driven jointly by hyperscalers, neoclouds, sovereign-AI programs, and model companies — not a typical inventory restocking cycle, and unlikely to reverse quickly.
Why isn't TSMC's CoW the bottleneck anymore?
TSMC's CoWoS — an advanced packaging technology that bonds chips and high-bandwidth memory onto a single substrate — is ramping more aggressively than expected: ~1.1 million units in 2026, targeting up to 2 million in 2027, far above the prior 1.3–1.35 million estimate.
Yet Nomura's own model assumes only 1.8 million units of output — because WoS (wafer-on-substrate, the step that mounts the finished wafer onto a board) and downstream small components cannot keep pace.
In plain terms = the front end — "making the chip" — has sped up, but the back end — "turning the chip into a finished product" — is short on parts. Actual output is capped by the slowest link.
Which small components are most likely to fall short?
Substrates, CCL (copper-clad laminate — the key material for substrates), high-end capacitors, PMICs (power-management chips), optical modules, power supplies, liquid cooling, and server racks — a shortage in any one of these constrains real conversion of front-end capacity.
When these suppliers set expansion plans in H2 2025, they systematically underestimated AI order elasticity — even more so than TSMC did.
This means → as Nvidia's Rubin and Amazon's Trainium 3 ramp from H2 2026, the gap is likely to widen further.
How are Nvidia and Google squeezing out everyone else?
Nomura raised its TSMC AI-logic chip revenue forecast: ~$22.1 bn in 2025 → ~$39.1 bn in 2026 → ~$65.4 bn in 2027; AI's share of total TSMC revenue rises from 18% to 32%.
Nvidia's share drops from ~60% in 2026 to ~53% in 2027; Google TPU climbs from 20% to 25% — together they account for roughly 80% of TSMC's AI revenue.
In plain terms = Nomura calls them "elephants fighting" — both grab CoWoS, substrates, HBM, test-and-package, and rack resources simultaneously. AMD, Amazon Trainium, and other xPU/ASIC players get pushed further back in the capacity queue.
What is TSMC's own dilemma?
To hit management's stated 50% CAGR for AI revenue from 2024–2029, AI-related revenue could reach roughly $115 bn by 2029.
If advanced packaging accounts for 30%–35%, CoWoS annual output would need to reach 2.5–3.5 million units — two to three times the 2026 level.
But if Nvidia's next-generation Feynman migrates to CoPoS — a different packaging architecture — CoWoS faces a technology-roadmap switch risk. This reflects TSMC's dilemma: expand too little and lose customers; expand too much and carry stranded capacity.
What sustains growth after 2028?
Nomura argues post-2028 growth is not simple capacity expansion — it hinges on a batch of new technologies delivering on time: EMIB-T, CoPoS, GPU-on-GPU SoIC, CPO (co-packaged optics — integrating optical-communication modules directly into chip packaging), next-gen SerDes, new PCB materials, glass/ceramic substrates, micro-channel cooling lids, and more.
Execution risk on these technologies is the key variable for whether the AI hardware cycle can extend beyond 2028.
This means → supply-demand mismatch, price hikes, and earnings upgrades remain the dominant catalysts through 2027 — but investors should stay alert to the technology-validation phase that follows.
Content is for reference only, not financial advice.