Nvidia Has Certified SK Hynix, Samsung, and Micron as HBM4 Suppliers
Claire Weston
Nvidia CEO Jensen Huang confirmed that SK Hynix, Samsung, and Micron have all been certified for HBM4 and entered production — the competition now shifts from qualification to packaging thermal management and low-power design.
All three certified — what does that mean?
Huang told reporters in Seoul that all three suppliers have been certified, are in production, and are racing to support Vera Rubin — Nvidia's next-generation AI chip platform.
This means → HBM4 is no longer an elimination round for who qualifies. It is now a three-way race on production efficiency.
SK Hynix, Samsung, and Micron together dominate the global computing memory market. All three receiving simultaneous certification is rare in Nvidia's supply chain.
What comes next — why has thermal management suddenly become the core problem?
Next-generation AI chips are approaching 1,000 watts per die, and HBM stacking is evolving toward roughly 20 layers. Thermal management has shifted from a system-level concern to a core bottleneck in package design.
In plain terms = chips are stacked higher and run hotter. If the package cannot dissipate the heat, both performance and reliability suffer.
Nvidia and AMD are now requiring HBM suppliers to strengthen thermal control and low-power design capabilities, directly driving the three vendors' diverging technology roadmaps.
Samsung's approach — building a dedicated "heat highway" inside the chip?
Samsung unveiled HPB (Heat Path Block) technology at COMPUTEX. The core idea: build an additional thermal conduction channel inside the HBM structure.
The target is D2D PHY — the die-to-die physical-layer interface circuit between chips — which is the primary heat source on the base die.
Samsung DS CTO Song Jae-hyuk said HPB has been validated in HBM4E. By placing a copper structure above the die to create a heat path, thermal resistance drops by up to 16%.
This reflects Samsung's strategy of integrating thermal structures into the full memory stack design, rather than treating them as a top-layer cooling add-on.
SK Hynix's approach — embedding cooling elements directly inside the package?
SK Hynix announced iHBM in late May, integrating cooling elements directly inside the HBM package for next-generation products including HBM5.
The core component, ICEs, is a thermally conductive but electrically insulating silicon-based material placed in the D2D PHY zone between the HBM stack and the GPU. It creates an additional heat path inside the package, reducing thermal resistance by 30%.
For production readiness, iHBM is built on wafer-level packaging processes and the proven MR-MUF technology. SK Hynix says this combination supports stable high-volume manufacturing.
Micron took a different path?
Micron did not focus on in-package heat paths. Instead, it chose a differentiated approach: low-power HBM design combined with TSV trench cooling.
In plain terms = Samsung and SK Hynix are adding heat sinks inside the package. Micron's idea is to generate less heat first, then channel it away through specialized vertical structures.
According to patent analytics platform PatSnap, a Micron patent granted in the U.S. in 2025 describes an electrically passive cooling TSV structure — through-silicon vias that penetrate the full memory stack purely for thermal conduction. These TSVs align with signal TSVs within the same package footprint, occupy no extra die area, and form a low-resistance vertical heat path in parallel with the electrical TSV network.
Three roadmaps — who has the edge?
Samsung's HPB targets 16% thermal-resistance reduction, already validated in HBM4E. Its advantage is technology maturity.
SK Hynix's iHBM targets 30% thermal-resistance reduction — a higher number, but production timing depends on HBM5 ramp schedules.
Micron's low-power route is clearly differentiated, but the patent was only recently granted and large-scale production validation remains ahead.
This means → in the short term, watch the thermal benchmarks; in the medium term, watch yield rates and cost. The ultimate winner is whoever can deliver reliably within Nvidia's Vera Rubin platform production window.
Content is for reference only, not financial advice.