NVIDIA Rubin Ultra NVL576 Architecture Revealed, Supply Chain Implications Emerge
Nashnova编辑部
Nvidia's next-gen Rubin Ultra GPU system will use NVL576 as its largest scale-up domain, with major changes to rack layout, switch trays, and PCB specs — directly affecting NVSwitch enclosures, backplane connectors, PCB makers, and the NPO optics chain.
What does the Rubin Ultra GPU bring over the current gen?
Peak thermal design power (TDP) reaches 2.6 kW per package, but the mainstream production version is expected to ship at 1.8 kW.
The Tachyon HPM board's PCB layer count rises from 26 to 30 layers, accommodating the more complex routing that higher power demands.
LPDDR5X memory modules move from the front of the HPM board to the back. This means → the front side frees up real estate for power delivery and cooling — a physical concession to 2.6 kW-class heat loads.
Why does the rack layout shift from "10+9+8" to "9+18+9"?
The current Rubin Oberon rack uses a "10+9+8" stack: 10 compute trays on top, 9 NVLink Switch trays in the middle, 8 compute trays on the bottom — all at 1U height.
Rubin Ultra moves to "9+18+9": compute trays stay at 18 total, but NVLink Switch trays double to 18, each compressed from 1U to 0.75U.
In plain terms = compute trays split evenly to the top and bottom, while the switch layer in the middle doubles in density. The goal is to shorten the signal path between the farthest compute node and the farthest switch tray, keeping NVLink signals reliable across the copper backplane.
The longest signal distance increases slightly from 19U to 22.5U — even with double the switch trays, signal integrity stays within range.
How do the NVL72 and NVL576 switch trays differ?
The NVLink Switch tray (codename Portia) comes in two versions: non-expandable for NVL72, expandable for NVL576.
The non-expandable version carries 2 NVLink Switch ASICs per tray — 18 trays yield 36 per rack, matching current-gen bandwidth.
The expandable version doubles that to 4 ASICs per tray, 72 per rack. This means → total switch bandwidth doubles, which is what cross-rack interconnect throughput requires.
Both versions share the same rack infrastructure and backplane. In plain terms = backplane suppliers only need one design, reducing supply-chain complexity.
NPO vs. CPO — which optical path ships first?
The expandable Portia tray is being developed on two optical interconnect tracks: NPO — near-package optics, where optical modules plug into sockets on the PCB next to the switch ASIC — and CPO — co-packaged optics, where optical engines are permanently mounted beside each ASIC.
The report judges NPO as the more mature path, and the likelier first-to-ship version for NVL576.
This reflects a pragmatic trade-off: CPO has a higher performance ceiling, but NPO is socketed and field-replaceable — friendlier to yield rates and maintenance at scale.
Who in the supply chain benefits most directly?
NVSwitch enclosure and rail-kit suppliers: switch tray count doubles, pulling shipment volumes up directly.
Backplane connectors: the upgrade from PHD2 to PHD3 raises per-unit value while connector count per rack stays the same.
PCB manufacturers: Tachyon HPM gains 4 layers with no material change. This means → higher value per board, but no structural material shift — a "price-up" story, not a "new-material" story.
NPO supply chain: if NVL576 ships in NPO form first, optical module and component makers benefit directly.
What is the biggest uncertainty right now?
Rubin Ultra's exact specs are still being finalized; the parameters above may change.
Two key milestones to watch: whether NPO ships ahead of CPO as expected, and the actual volume-production cadence of the NVL576 form factor.
In plain terms = the architectural direction is clear, but between a block diagram and mass shipments sit yield, cost, and capacity — whether the supply-chain logic plays out depends on these two milestones landing on schedule.
Content is for reference only, not financial advice.