Samsung and SK Hynix Delay Hybrid Bonding Adoption Timeline
Miles Bennett
Samsung and SK Hynix have delayed introducing hybrid bonding in next-generation HBM to as late as the 16-layer HBM4E, as relaxed thickness standards and alternative cooling solutions weaken the short-term case — but I/O density doubling will make the technology unavoidable by HBM5E.
Why didn't hybrid bonding arrive on schedule?
Hybrid bonding — joining chip copper traces directly, with no solder bumps — was expected to debut with HBM4. Both Samsung and SK Hynix stuck with conventional thermocompression bonding instead.
This means → the earliest node for hybrid bonding has slipped to the 16-layer version of HBM4E, at least one generation later than expected.
In plain terms = the new technology works, but the old one still holds up — so the makers chose not to switch yet.
How did looser thickness standards reduce the pressure to switch?
HBM3E and earlier products faced a 720 µm thickness ceiling. HBM4 raised it to 775 µm, giving more room as stacking moves from 8/12 layers to 12/16.
JEDEC is now discussing raising the HBM5 ceiling for 20-layer products to roughly 1,000 µm (currently about 900 µm).
This means → the more generous the standard, the less urgent it is to shrink inter-die spacing — hybrid bonding's core pitch of "saving height" loses near-term force.
12 layers or 16 — what do customers actually want?
Industry sources say discussions between customers and makers on 16-layer HBM remain limited. 12-layer products are expected to stay mainstream through the HBM4E generation.
Samsung's 12-layer HBM4E samples reach up to 16 Gbps, more than 20% faster than HBM4. SK Hynix's samples match at 16 Gbps per pin, with power efficiency up over 20%.
In plain terms = 16 layers are where hybrid bonding matters most, but the market isn't there yet — 12 layers work fine with the existing process.
Can the thermal problem be solved without changing the bonding method?
Hybrid bonding's other advantage is removing underfill — a poor thermal conductor — to improve heat dissipation. But both companies have built alternative cooling solutions that bypass this need.
Samsung calls its solution the Heat Path Block (HPB); SK Hynix calls its version iHBM. Both place standalone thermal components beside the HBM stack and are currently in HBM5 testing.
This reflects a preference for patching the existing bonding infrastructure rather than overhauling the entire process for thermal gains alone.
When does I/O density make hybrid bonding unavoidable?
HBM4 doubles I/O count to 2,048, demanding tighter die spacing. Thermocompression bumps spread laterally during bonding and may not scale to high-density layouts.
The industry is discussing a further doubling to 4,096 I/Os at HBM5E — at that point hybrid bonding may shift from optional to necessary.
Samsung research shows hybrid copper bonding produces lower hotspot temperatures in server simulations and can cut stack height by more than 15%.
Is this an exit or a sequencing decision?
Both companies continue to invest in hybrid bonding R&D. The current strategy is closer to sequencing than to abandonment.
This means → during the window where standards and customer demand remain stable, the makers extend the life of existing processes. Once I/O density exceeds thermocompression's limits, the switch becomes inevitable.
Put simply = the technology roadmap hasn't changed — only the timeline has shifted. Hybrid bonding moved from "next generation" to "the generation after that."
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