TSMC Expands 3nm Capacity Again: HBM Base Die Demand Is the Key Driver
nashnova research
TSMC plans to sign for a second 3nm fab (code-named P10) by mid-2026, driven not by smartphones but by HBM base dies for AI accelerators — a signal that 3nm's commercial life will stretch far beyond what the market expected.
Smartphones are moving to 2nm — why build more 3nm?
TSMC expects to sign a land deal with the Tainan city government by mid-2026, securing a new plot in the Southern Taiwan Science Park for a second 3nm fab, code-named P10, targeting volume production in H1 2028.
This means → groundbreaking-to-production in just 18 to 24 months, well ahead of the typical fab build cycle — pointing to urgent demand.
In plain terms = by 2028, mainstream phone and HPC chips will have moved to 2nm or beyond. 3nm should be "yesterday's node." Yet TSMC is accelerating capacity — because the demand source has changed.
Who is consuming all this 3nm capacity?
The core demand comes from custom HBM base dies for AI accelerators — a logic chip sitting at the bottom of each HBM stack, acting as its foundation. Customers include NVIDIA, AMD, and Google.
TSMC's original roadmap called for N3P custom base dies starting at HBM5, but supply-chain signals suggest the timeline may pull in to HBM4E. This means → memory price surges pushed chipmakers to delay HBM5, so custom features are being front-loaded into HBM4E — pulling 3nm demand earlier.
A single AI accelerator carries six to eight or more HBM stacks, each needing its own base die. In plain terms = one GPU consumes six to eight 3nm chips, a far heavier draw than the "one chip per phone" model.
Additionally, server CPU demand driven by agentic AI and mid-tier CPUs staying on 3nm through 2028 further support the expansion case.
Why is Samsung's HBM order moving to TSMC?
Reports say NVIDIA is shifting custom HBM base dies previously made by Samsung to TSMC. Analyst Lin Jun-ji noted this does not necessarily mean Samsung has a technology or yield problem.
Micron and SK Hynix already produce their own base dies on TSMC wafers. If NVIDIA consolidates all base dies at TSMC, it no longer needs to maintain two parallel designs for two different fabs. This means → the core concern is consistency — uniform performance and power specs — not yield rates.
Another possible factor: Samsung's planned 2nm capacity may already be committed to its own chips and external customers such as Tesla, leaving it unable to offer NVIDIA the capacity terms it needs.
Why would A14 demand exceed 2nm?
At the earnings call, multiple analysts asked whether TSMC's forecast that A14 (1.4nm) demand will surpass N2 (2nm) already includes potential Intel server-CPU orders. TSMC said it considers customer expansion plans but did not directly confirm Intel server CPUs are in the projection.
This reflects a key market question: Intel currently uses TSMC only for PC chips; server CPUs remain on Intel's own lines. If server CPUs shift too, the pull on A14 capacity would be transformational.
On cadence: 3nm to 2nm took about three years; 2nm to A14 is only two and a half. In plain terms = TSMC is accelerating its node progression. A14 targets H1 2028 volume production, with Apple's iPhone processor likely as the first customer.
What does this mean for the competitive landscape?
TSMC holds both leading-edge process technology and massive capacity scale — Intel and Samsung struggle to match on either dimension simultaneously.
This means → whether Intel server CPUs are truly factored into the A14 demand forecast becomes a critical verification point for the market — confirmation would widen TSMC's lead further.
This reflects a shift in foundry competition: from a pure "process race" to a dual barrier of process leadership plus capacity scale.
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