TSMC Raises CoWoS 2027 Capacity Target to 200K Wafers
Alina Collins
TSMC has raised its 2027 CoWoS advanced-packaging target to 200,000 wafers per month, but the market widely expects actual output to reach 240,000–260,000 — and even that, supply-chain sources say, will not be enough.
What does 200,000 wafers a month actually mean?
TSMC's CoWoS — a packaging process that bonds AI chips to high-bandwidth memory on one substrate — ran at roughly 30,000 wafers/month in 2024, rose to 70,000 in 2025, and surpassed 130,000 by end-2026. The 2027 target is 200,000.
This means → capacity has grown nearly 7× in three years; the ramp itself is the clearest proof of how intense AI compute demand has become.
Equipment vendors say 200,000 is a floor, not a ceiling. The market expects year-end output of 240,000–260,000 — TSMC has historically beaten every official target it set.
Nvidia locks up over half — what does AMD do?
Nvidia has secured more than half of TSMC's CoWoS capacity, leaving very little room for other customers.
AMD has been forced to outsource roughly half its orders to three OSAT firms — ASE (日月光), SPIL (矽品), and Amkor (安靠) — and has announced a second packaging supply line built around EFB technology.
In plain terms = Nvidia has effectively booked out TSMC's most advanced packaging lines; AMD must assemble its own alternative supply chain.
Cloud providers' in-house ASIC chips have emerged as another growth engine for 2027 CoWoS demand, intensifying the capacity battle.
Why has SoIC capacity suddenly jumped 5×?
TSMC's SoIC — a 3D packaging technology that stacks multiple chips vertically — saw its 2027 capacity forecast revised from an early estimate of 10,000 wafers/month all the way up to 50,000, with Nvidia locking in most of it.
This means → next-generation AI chips need both the "spread flat" approach of CoWoS and the "stack upward" approach of SoIC, and both lines are running tight.
At the Zhunan AP6 fab, buildings A and B already deliver close to 10,000 wafers/month combined, and the third phase has received its occupancy permit. The AP5B fab in Central Taiwan Science Park is nearing completion, primarily serving CoWoS while expanding SoIC and InFO capacity.
Orders booked through 2030 — what does that signal?
Supply-chain sources say TSMC has confirmed SoIC and CoWoS progress to equipment vendors, with equipment-order visibility stretching to 2030.
This reflects a shift: advanced packaging is no longer a short-term catch-up effort but a five-year-plus capacity arms race.
ASE, SPIL, Powertech (力成), and Amkor are all expanding aggressively; Amkor's U.S. and South Korean sites have begun installing Taiwanese equipment.
What risks still hang over the supply chain?
TSMC has for the first time selected five domestic Taiwanese equipment makers for a "trusted partner" list, bringing them into a joint-development framework to accelerate local supply-chain buildout.
Yet equipment vendors are still waiting for TSMC to finalize order allocations; lead times run seven to nine months, and the delay has fueled concerns about pricing pressure and delivery risk.
Put simply = even at a breakneck expansion pace, scale-up risk, monopoly concerns, and U.S. domestic-manufacturing requirements continue to constrain how fast capacity can actually come online — the supply shortage is unlikely to ease any time soon.
Content is for reference only, not financial advice.