TSMC Unveils First Glass Substrate Validation Results, Accelerating CoPoS Packaging Competition
Taylor Wilson
TSMC disclosed glass-substrate test data for the first time, confirming with Ibiden and Innolux that glass can be integrated into next-gen CoWoS packaging — warpage improved 16%, inductance dropped 42%. This means → the "substrate war" in advanced packaging has moved from the lab to a production race, with Intel and Samsung already ahead.
How does glass actually beat organic substrates?
The test sample used a 0.8 mm glass-core substrate at 85 × 110 mm — large enough for AI GPU-class packages.
Versus organic substrates: warpage improved 16%, effective CTE dropped 19%, effective modulus rose 31%; on the power-delivery side, resistance fell 27% and inductance fell 42%.
In plain terms = as chips grow larger, organic substrates bend, expand unevenly, and struggle to deliver clean power. Glass outperforms on every one of these metrics — and it is thinner yet flatter.
TSMC highlighted that the test showed "no severe warpage or delamination" — the two defects that have historically killed yield on large packages.
What still stands between glass and mass production?
The core bottleneck is TGV — through-glass vias, tens of thousands of micro-holes drilled through glass and filled with copper so signals and power can pass vertically.
Glass is hard and brittle; micro-cracks form easily during processing. Via formation, copper-fill quality, and long-term thermal reliability are the three gates to volume production.
TSMC itself acknowledged that glass-thickness optimization and large-package layout work remain, and full mass production is still some distance away.
Why bring in Ibiden and Innolux?
Ibiden is a key substrate supplier for Nvidia and AMD AI chips and has committed ¥500 billion to a new plant focused on high-end AI-server substrates. This means → by choosing Ibiden as a validation partner, TSMC locks in the largest substrate capacity serving AI packaging.
Innolux is a display-panel maker with deep expertise in large-format glass processing. In plain terms = handling big sheets of glass is what panel fabs already do — pivoting to glass substrates is a reuse of existing capability.
The three-way validation pulls both the materials side (Ibiden) and the glass-processing side (Innolux) into TSMC's packaging ecosystem, building the supply chain ahead of volume ramp.
Where do Intel and Samsung stand?
Intel has invested in glass substrates for over a decade. Its Arizona pilot line is moving toward commercialization — making it the earliest and deepest player globally.
Samsung Electro-Mechanics set up a pilot line in 2025 and formed a joint venture with Japan's Sumitomo Chemical to secure supply early.
TSMC's disclosure is its first public reveal of validation results — later than both rivals. This reflects TSMC's traditionally cautious pace, now being pushed faster by customer specs and competitive pressure.
Why is CoPoS the next battleground?
TSMC indicated that advanced-packaging competition is shifting from CoWoS — Chip-on-Wafer-on-Substrate, where chips sit on a wafer-scale interposer — toward CoPoS — Chip-on-Panel-on-Substrate, which replaces the wafer-scale interposer with a panel-scale one.
In plain terms = wafer-scale interposers have a size ceiling; panel-scale ones can be much larger, fitting more chips. This means → whoever achieves production-grade yield on CoPoS first wins the ticket to next-generation AI chip packaging.
Whether glass substrates can reach mass-production yield on TSMC's CoPoS platform will be the decisive test of whether this technology path can truly replace organic substrates.
Content is for reference only, not financial advice.