YMTC Enters 4F² DRAM Race, Targeting 9600 MT/s Speed
nashnova research
YMTC (长江存储), China's largest NAND flash maker, is developing a 4F²-architecture DRAM chip targeting 9600 MT/s, but no mass-production timeline exists yet — equipment restrictions and yield validation remain the core unknowns.
What is 4F² architecture, and why is YMTC pursuing it?
4F² — a cell layout that shrinks each memory unit by roughly one-third versus the conventional 6F² design — paired with vertical-channel transistors (VCT, stacking transistors upward instead of laying them flat) can raise storage density without more advanced lithography tools.
This means → for a company on the U.S. Entity List since December 2022 with limited access to cutting-edge equipment, 4F² is a practical path around the tooling bottleneck.
But smaller cells ≠ lower cost or better performance. Yield, process complexity, and device reliability — the factors that determine commercial viability — are all unproven for YMTC.
How many DRAM projects is YMTC running at once?
Two independent tracks in parallel: the 4F² project targets 9600 MT/s and is slated for Wuhan Fab 3; a separate 16 Gb LPDRAM project has been underway at Wuhan Fab 2 since October 2025, targeting 7500 MT/s at roughly 5,000 wafers per month.
The 4F² design focuses on low-power memory for smartphones and mobile devices; the 16 Gb line is a standalone R&D effort. The two do not depend on each other.
In plain terms = YMTC is running two technical bets in parallel, waiting to see which one clears the bar first.
Who else in China is chasing 4F² DRAM?
CXMT (长鑫存储) plans to ship 4F²-based DDR5 server RDIMM modules by late 2026, aimed at the data-center market.
YMTC's 4F² design targets mobile low-power memory — different end market, but the underlying architecture overlaps.
Neither company has demonstrated volume-production capability on the 4F² node; the race is still at the R&D stage.
How is YMTC's core NAND business performing?
In Q2 2026, YMTC ranked third globally by NAND bit shipments, surpassing Kioxia and Micron, behind only Samsung and SK Hynix (including Solidigm).
By NAND revenue it still ranks fifth. This reflects a product mix still tilted toward low-price consumer storage, with a relatively small share of high-margin enterprise SSDs (eSSD).
eSSD is the industry's fastest-growing segment: it accounted for roughly 48% of global NAND bit shipments in Q2 2026, up from 26% a year earlier, driven by AI data-center demand.
Where does the IPO money go — any earmarked for DRAM?
Parent company CCSH Corporation filed in August 2026 for a Shanghai STAR Market listing, seeking to raise RMB 33 billion: RMB 20.8 billion for production-line upgrades and RMB 12.2 billion for R&D covering next-generation NAND and high-speed memory products.
The application entered the inquiry phase in September, but the listing is not yet complete.
This means → the fundraising disclosure does not separately earmark funds for the 4F² DRAM project — DRAM is not the headline of YMTC's capital-raising story.
What ultimately decides whether this works?
YMTC's Xtacking technology from its NAND business — fabricating the memory array and peripheral circuits separately, then bonding them at wafer level — may offer process know-how transferable to DRAM, but DRAM poses fundamentally different challenges in capacitor performance, leakage current, and refresh mechanisms.
Equipment restrictions remain the biggest external variable: since the December 2022 Entity List designation, access to certain U.S. semiconductor tools and technology is blocked.
In plain terms = the architecture can be drawn on paper, but whether YMTC can push yields high enough under export controls — and then win customers away from Samsung, SK Hynix, and Micron — is the final exam that determines this bet's commercial value.
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