Micron Executives: Memory Is the AI Performance Bottleneck, New Capacity Won't Come Online Until After 2028
nashnova research
Micron senior adviser Sumit Sadana said AI system performance is now gated by memory bandwidth and capacity, and meaningful new supply won't begin arriving until 2028 — leaving the supply-demand gap to widen in the interim.
Why has memory become AI's bottleneck?
AI models must sit entirely in memory to run. Massive datasets shuttle back and forth between memory banks — the bandwidth between processors and memory is the binding constraint on performance today.
This means → no matter how fast a GPU is, if data can't be fed in quickly enough, compute power idles. Memory sets AI's real speed ceiling.
The supply side is structurally fragile: over 20 DRAM makers existed in the early 1990s; only a handful remain. Meanwhile, more than 20 companies now design processors. In plain terms = a few memory firms must feed an entire ecosystem of chip designers — a funnel-shaped supply chain that is acutely vulnerable to an AI demand surge.
How much is Micron spending — and why can't capacity keep up?
Capital expenditure is doubling year on year: just over $13 billion in fiscal 2025, doubling in fiscal 2026, and expected to exceed $45 billion in fiscal 2027. Micron's U.S. investment commitment rose from $200 billion to $250 billion.
Roughly 20 expansion projects are under way simultaneously across Idaho, New York, Taiwan, Japan, and Singapore.
Yet capacity release is constrained by infrastructure build-out, regulatory approvals, and a skilled-labor shortage. Sadana was explicit: "Meaningful new supply won't begin to come online until 2028 — and even that is just the early phase."
This means → the money is committed, but there is a multi-year lag from investment to output. The supply-demand gap will most likely keep widening before 2028.
What makes HBM so hard to manufacture?
Take HBM — high-bandwidth memory, a type of storage that vertically stacks multiple DRAM dies to feed AI chips data at high speed: 12 layers of DRAM stacked on top of one another, roughly 2,000 process steps inside the fab, and about five months from production start to customer delivery.
Sadana called it "almost a miracle" that HBM works at all. In plain terms = the process-step count approaches aerospace-engine-level complexity; a failure at any point slows the entire line.
This reflects a hard constraint: memory capacity cannot simply be "bought faster." Manufacturing complexity itself caps how quickly supply can grow.
Why is the business model shifting from spot sales to long-term deals?
Micron has moved from traditional one-year spot transactions to multi-year "strategic customer agreements" — customers commit demand forecasts, Micron commits supply, both sides lock in.
This means → extreme capacity scarcity is reshaping pricing power across the industry. Sellers no longer negotiate quarter by quarter; they secure multi-year revenue visibility that underwrites massive capex.
A deeper shift: customers are embedding memory design into their five-to-seven-year product roadmaps. Sadana compared the model to ASIC partnerships — custom chips designed for a specific client. This reflects memory evolving from a "commodity part" into a "strategically locked resource."
Where is the next wave of demand?
Sadana identified humanoid robots as the largest incremental market after data centers. Each robot would need hundreds of gigabytes of DRAM and terabytes of NAND flash, and must operate autonomously without a constant network connection.
In plain terms = a robot that works on its own is effectively a mobile data center — its memory demand dwarfs that of a smartphone.
AI demand is spreading from data centers to the edge, autonomous vehicles, smartphones, and robots — multiple waves stacking on top of one another, not replacing each other. This means → before capacity begins to arrive in 2028, the demand side keeps adding up, making the supply-demand gap the central test of the memory sector's valuation thesis.
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