NVIDIA Rubin Ultra Scales to 576 GPUs; Rack-Scale AI Systems Become Key Theme by 2027
nashnova research
Nvidia's next-gen AI platform, Rubin Ultra, expands a single rack from 72 to 576 GPUs, with mass production targeted for H2 2027 — the product focus is shifting from single-chip performance to whole-rack orchestration, broadening the supply-chain beneficiary map far beyond chips and packaging.
Where does the current product line stand?
Vera Rubin NVL72 entered quality-sample stage in July 2026 and hits mass production in August — the fastest-moving SKU.
NVL4 targets quality samples in September, mass production in November; HGX Rubin NVL8 is on the same September sample, September production track.
This means → Rubin is not one product but three parallel lines — NVL72 / NVL4 / NVL8 — and downstream suppliers need to be ready to take orders across all three in H2 2026.
What about the CPU and accelerator chip timelines?
On the CPU side, Vera 1S/2S entered quality samples in April and targets October mass production; the 2026 revision follows in September–October.
Groq LPX — Nvidia's in-house AI inference accelerator — is expected to reach quality samples in Q4 2026 and mass production by year-end.
The next generation, Groq 3 LPX-Next, slips to H2 2027. This means → CPU, GPU, and accelerator lines hit their mass-production windows almost simultaneously by late 2026, stacking pressure on packaging and test capacity.
What makes fitting 576 GPUs into one rack so hard?
From NVL72 to NVL576, GPU count jumps 8× — but the bottleneck is no longer single-chip compute. It is how 576 GPUs talk to each other, and how the rack is powered and cooled.
On interconnect, 1.6 Tb/s optical modules are already in mass production. Near-package optics (NPO — placing optical links close to the chip package) and co-packaged optics (CPO — embedding optics inside the package) are moving closer to GPUs and switches.
In plain terms = upgrading an AI server used to mean "swap in a faster chip." Now it means "make 576 chips work as one" — optical interconnect, power delivery, and cooling are all must-haves.
What does Nvidia's full platform puzzle look like?
Vera handles CPU compute; Rubin raises GPU compute density; NVLink boosts GPU-to-GPU bandwidth; NVHBM redistributes memory-controller functions.
NVLink Fusion is a new interface that plugs third-party accelerators (XPUs) into the Nvidia platform. This means → Nvidia is not just selling its own chips — it is using platform standards to lock in the entire AI compute architecture.
This reflects a competitive strategy shift: from "lead on single-chip performance" to "define the rules for the whole rack."
Which parts of the Taiwan supply chain benefit?
TSMC, advanced packaging (CoWoS), high-bandwidth memory (HBM), and ABF substrates remain the core beneficiaries.
Newly rising segments include high-end copper-clad laminates, M9 low-loss materials, high-layer-count PCBs, NVLink-related boards, 1.6 Tb/s optical modules, CPO/NPO, 800 VDC power supplies — data-center-grade high-voltage DC — and liquid cooling systems.
In plain terms = the AI-server supply chain used to revolve around "chips + packaging." In the NVL576 era, optical links, power, cooling, and circuit boards all become essential — the beneficiary map is far wider than one generation ago.
What should investors watch for in H2 2027?
Whether NVL576 reaches mass production on schedule in H2 2027 is the key milestone for validating Nvidia's rack-scale AI roadmap.
This means → over the next 12 months, the core variable is not "how high the chip benchmarks" but whether optical interconnect, 800 V power, and liquid cooling can scale fast enough to support 576 GPUs per rack.
This reflects a broader shift: the main thread of AI hardware investment is moving from "chip performance race" to "system integration race."
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