TSMC Delays CoWoS Equipment Orders as CoPoS Plan Emerges
nashnova research
TSMC has reportedly postponed advanced-packaging equipment orders for 2027, fueling speculation it expects CoWoS overcapacity; meanwhile, an alternative pathway called CoPoS is quietly taking shape — reshuffling the order outlook for packaging suppliers.
Why is TSMC pulling back on orders?
Per Digitimes, TSMC has delayed placing equipment orders originally slated for 2027 delivery in its advanced-packaging lines.
This means → TSMC may already see that expanding CoWoS (Chip-on-Wafer-on-Substrate — a technique that bonds chips onto a silicon wafer, then mounts the wafer onto a substrate) at the planned pace would create surplus capacity.
In plain terms = the delay isn't about budget — it's about demand cooling faster than the buildout.
What is CoPoS, and why is it surfacing now?
CoPoS (Chip-on-Package-on-Substrate) is a separate advanced-packaging pathway TSMC is developing — positioned as a potential substitute for, or complement to, CoWoS.
The key difference: CoWoS bonds chips to a silicon wafer first, then to the substrate; CoPoS restructures that sequence, aiming to cut cost or improve flexibility.
This reflects a hedged strategy — TSMC is not betting on a single packaging path, and the moment CoWoS demand expectations soften, the backup route gains strategic weight.
What does this mean for the supply chain?
The order delay hits packaging-equipment and materials suppliers most directly — their delivery schedules are now in flux.
This means → if TSMC structurally rebalances capacity between CoWoS and CoPoS, suppliers will need to pivot their product mix accordingly.
Specific order volumes and a CoPoS mass-production timeline have not been disclosed — these are the key variables to watch for signals on TSMC's packaging strategy.
市场有风险，内容仅供研究参考，不构成投资建议。