20 Chinese OSAT Firms Advance in Advanced Packaging, Bypassing EUV Restrictions
nashnova research
A QYResearch Korea report shows 20 of China's 43 OSAT firms now mass-produce advanced packaging, forming a three-tier hierarchy — with EUV lithography equipment blocked by export controls, this route is becoming China's primary alternative path to higher chip performance.
What problem does advanced packaging actually solve?
The conventional way to boost chip performance is shrinking transistors — but that requires EUV lithography tools (machines that etch circuits with extreme-ultraviolet light), which China currently cannot buy.
Advanced packaging takes a different route: it integrates multiple chips inside a single package using TSV (through-silicon vias — vertical channels drilled through silicon to connect stacked chips), interposers, and bridges, enabling high-speed chip-to-chip communication.
This means → performance improves without smaller transistors, and chips built on different process nodes can be mixed in one package. The industry calls this the "More than Moore" strategy.
Twenty firms, three tiers — who sits where?
Tier 1 — 4 firms: JCET, TongFu, Hua Tian, and SiPex have reached mass production in high-density fan-out, FC-BGA (flip-chip ball grid array — a high-pin-count, high-performance packaging format), 2.5D/3D integration, and chiplets.
Tier 2 — 12 firms: including Forehope, SMWT, Chengdu Eswin, and ChipEx, each with volume production in specific advanced-packaging technologies.
Tier 3 — 4 firms: emerging players investing in next-generation 2.5D/3D integration and chiplet technologies but not yet at full-scale production.
In plain terms = Tier 1 covers the full stack, Tier 2 firms each own a specialty, Tier 3 is still ramping — but twenty firms running together is no longer a single-point effort.
Why is JCET singled out?
The report assessed six core technologies. JCET has five in mass production; only silicon-photonics CPO (co-packaged optics — bundling optical communication modules with the chip to dramatically boost data-transfer speeds) remains in pre-production.
Korean outlet ETNews reported earlier this year that JCET has shipped silicon-photonics engine samples to clients, entering the customer-qualification stage.
This means → JCET has the broadest technology coverage among China's OSAT firms, one step away from a clean sweep of all six categories.
How much policy support is behind this?
Funding: the National IC Industry Investment Fund ("Big Fund"), tax incentives, and local industry funds stack three layers deep.
Planning: the 2014 national IC development roadmap already named TSV and 3D packaging as priorities; 2020 policies on high-quality IC development elevated advanced packaging to a strategic pillar.
This reflects a decade-plus of systematic state-level commitment — advanced packaging in China is not a scattershot corporate initiative but a coordinated push from national planning down to capital allocation.
Can this route truly substitute for leading-edge process nodes?
The report shows China's OSAT industry is shifting its commercial center of gravity from low-cost, high-volume manufacturing toward AI accelerators and high-performance computing — higher-value applications.
The industry structure is also evolving: large OSAT firms build broad technology portfolios while smaller firms and startups specialize in single processes that plug into heterogeneous-integration platforms.
In plain terms = packaging-as-alternative-to-process is not one firm's bet — it is an entire ecosystem pressing toward AI and HPC. Whether it can deliver true system-level competitiveness is the ultimate test for the "More than Moore" thesis.
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