3.2T Optical Module Upgrade Forces PCB Redesign, Only 3 Qualified Suppliers Remain
nashnova research
The 3.2T optical module demands PCB trace width down to 10–15 µm, pushing fabrication from mSAP to full SAP process — only three PCB makers worldwide meet both requirements, just as capacity competition with AI chip substrates intensifies.
What does the 3.2T module demand from PCBs?
Optical modules are advancing along the 800G → 1.6T → 3.2T path. Per-lane speed doubles from 100G to 400G, and each generation requires finer PCB line width/spacing (L/S).
The 3.2T generation, slated for mass production in 2028, needs L/S of 10–15 µm. This means → the current mSAP process (modified semi-additive, capable of 12–25 µm) is no longer sufficient; makers must move to the more complex SAP (semi-additive process).
In plain terms = mSAP is a "refined version of the old method." SAP rebuilds from scratch — finer traces, near-vertical sidewalls — but at markedly higher cost and complexity.
Why do only three suppliers qualify?
3.2T PCBs require both SAP capability and FCBGA substrate manufacturing — flip-chip ball grid array, a high-end packaging technique that mounts chips face-down onto the substrate. Having both is a steep double bar.
Only three makers clear it: Taiwan's Zhen Ding Technology and Unimicron, plus mainland China's Shennan Circuits.
This reflects a "semiconductor-like" shakeout inside the PCB industry — the closer precision gets to chip-level, the fewer players remain at the table.
Why is the capacity window so tight?
The 3.2T production timeline (2028) overlaps with a tight-supply cycle for IC substrates. This means → if optical-module makers fail to lock capacity early, they will compete head-to-head with AI and HPC chip makers for the same fabrication resources.
More suppliers support mSAP (Zhen Ding, Unimicron, Compeq, Shennan Circuits), and that supply-demand squeeze is expected to ease around 2027. SAP capacity, however, remains concentrated in the top three — with no buffer.
In plain terms = mid-tier capacity will gradually loosen, but the bottleneck at the top end will only tighten further.
How do materials and processes evolve from 800G to 3.2T?
800G (volume production from 2026): PCB designs use both HDI (high-density interconnect) and mSAP routes; copper-clad laminate (CCL) grades move from M4/M6 up to M6/M7.
1.6T (ramping from 2026): L/S narrows to 20–30 µm; mSAP is the primary route; materials shift entirely to M8 grade, with widespread use of low-CTE (coefficient of thermal expansion) carrier copper foil and glass-fiber cloth.
3.2T (starting 2028): planned on M9-grade materials with SAP fabrication — each generation ratchets up both material grade and process precision in lockstep.
How large is this market?
Per Digitimes, the data-center optical-module market is projected to grow from $12.6 billion in 2025 to $45.4 billion by 2030 — nearly a 2.6× increase in five years.
The market is turning over fast: 400G ceded ground to 800G in 2025; 1.6T ramps from 2026; 3.2T takes the baton from 2028.
This means → whether a module maker can book capacity before the 2028 production window will determine its ability to enter the 3.2T race — the starting line is not R&D, but capacity positioning.
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