Jefferies OCP Summit Preview: 1.6T Volume Ramp and High-Voltage Power Delivery Reshape AI Rack Value Chain
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Jefferies laid out five investment threads ahead of the OCP Global Summit, with one core call: data transport, memory, and power delivery are now the real bottlenecks on GPU compute — and suppliers around those bottlenecks stand to capture rising per-rack value.
Who does Jefferies like most in the 1.6T upgrade?
Jefferies names MACOM and Lumentum as its top picks for the 800G-to-1.6T transition. MACOM's edge lies in photodetectors and multi-channel transimpedance amplifiers; Lumentum's lies in transmitter-side product mix, pricing, and capacity.
This means → as optics shift to 1.6T, laser sources and signal-amplification chips are the two component layers that benefit first.
Broadcom is at the center of the DSP chip — the chip that converts optical signals into digital data — share race; early channel signals favor it. Coherent's PhotonLink has engaged more than ten customers across CPO and NPO, with volume revenue expected from Q4 2026.
Three-way fight for scale-up interconnect — how does this play out?
High-speed GPU interconnect is a three-way contest: Nvidia's NVLink, the open-camp UALink, and Ethernet-based approaches. Nvidia is widening its ecosystem via NVLink Fusion and may disclose an NPO roadmap for NVL576 scale-up at the summit.
AMD launched Helios in July and plans late-2026 deliveries to Microsoft and others; the investment focus falls on deployment execution and UALink adoption. Marvell's 100G-per-lane UALink switch chip is expected to tape out this year.
In plain terms = this fight decides which communication protocol runs inside GPU clusters — whoever's protocol gets adopted turns their chip into a standard component.
microLED and micro-VCSEL — what new optical paths are emerging?
Credo is expected to debut its ALC product combining its own connectivity platform with microLED technology acquired from Hyperlume, targeting active-electrical-cable-level power and reliability over distances up to ~30 meters.
Jefferies sees microLED as more likely aimed at scale-out (rack-to-rack), while a potential micro-VCSEL path could target scale-up (within-rack interconnect).
This means → Jefferies is also watching whether ams-OSRAM's micro-VCSEL can enter Nvidia's future scale-up architecture, including a potential NVL1152 Feynman opportunity — a path that, if realized, could reset assumptions about indium-phosphide laser value.
Inference workloads are surging — how is the memory bottleneck addressed?
Inference workloads — the process where AI models generate predictions and answers — are expanding fast, opening growth in memory controllers, switch chips, and tiered memory architectures.
Astera Labs' Leo product line is the concrete landing point: Leo 2 E uses CXL 3.2 — a protocol that lets CPUs share external memory — for CPU memory expansion; Leo 2 P enables cross-host memory pooling; GPU-facing Leo X connects a dedicated memory tier via proprietary protocols. New products are sampling with hyperscale cloud customers.
This reflects a deeper signal: the stronger the GPU, the more valuable the surrounding memory and interconnect ecosystem becomes — Marvell also highlights CXL and memory controllers as key adjacencies growing alongside XPU deployment.
400V first or straight to 800V — which power path wins?
Jefferies expects Nvidia's summit keynote to further clarify opportunities for Texas Instruments, Analog Devices, and onsemi in high-voltage DC power delivery. Delays in the Kyber rack and the 800V transition timeline have already driven pullbacks in related stocks.
Near-term, a 400V solution is expected to land first on the OCP Diablo 400 rack, with subsequent Oberon/Taycann racks pushing power levels higher. Navitas Semiconductor has high business sensitivity to 800V adoption; sidecar power shelves may serve as a transition before full rack-level 800V deployment.
In plain terms = the sequencing of 400V versus 800V directly determines when power-semiconductor suppliers start booking revenue — Nvidia's specific comments at the summit are the key checkpoint for validating that timeline.
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