UBS Raises CoWoS Capacity Forecast: 2027 Demand Nearly Doubles from 2026
nashnova research
UBS lifted its year-end 2027 global CoWoS capacity forecast to 270k wafers/month, up 69% from 160k at end-2026; total demand is projected at 2.63 million wafer equivalents, nearly double 2026 — driven by ASIC and CPU uptake that is reshaping the customer mix of advanced packaging.
Demand doubles — where is the money coming from?
UBS projects 2027 global CoWoS — a packaging technology that bonds chips and high-bandwidth memory together like a sandwich — demand at 2.63 million wafer equivalents, nearly double 2026's 1.321 million.
Nvidia remains the single largest customer at 1.29 million wafers in 2027, but its share drops from 60% to 49%. This means → Nvidia still eats the biggest slice, but the "one-customer dominance" era is fading.
ASIC — custom chips designed in-house by tech giants — share rises from 30% to 33%; AMD's share jumps from 10% to 18%, driven by the Venice server CPU ramp. In plain terms = CoWoS used to be almost an "Nvidia-exclusive production line"; now custom chips and AMD are claiming nearly half the capacity.
ASIC projects are accelerating — who is moving fastest?
Microsoft's Maia 300 shows competitive performance. UBS expects Maia 200/300 shipments of 50k / 350k units in 2027, up sharply from roughly 100k total Maia units in 2026.
OpenAI's Jalapeño chip is forecast to ship 600k–700k units in 2027, up from 150k in 2026 — more than a fourfold increase.
Google TPU and Amazon Trainium are on track: 2027 packaging volumes of 9 million / 3.2 million units, up from 4.1 million / 2.5 million in 2026. This reflects hyperscalers pushing custom silicon from pilot phase to mass production.
Meta's MTIA targets roughly 450k units, but UBS flags relatively low visibility — the ramp timeline remains uncertain.
What is new for Nvidia and AMD?
UBS raised Nvidia's 2027 AI GPU production estimate from 8.2 million to 8.8 million units and added roughly 200k Rubin CPX units as a new line item.
Rubin Ultra shares a similar packaging architecture and benefits from adjusted HBM — high-bandwidth memory, the key component that "feeds data" to AI chips — specs, enabling a smoother ramp from mid-2027.
On AMD, UBS lifted its 2027 CoWoS demand forecast by 11%, projecting Venice CPU shipments of 5 million units, up from a prior estimate of 4 million. This means → AMD is shifting from a supporting player to the second-largest driver of CoWoS capacity.
Supply side — can TSMC still monopolize it?
The CoWoS supply landscape is diversifying fast. ASE's CoW capacity will expand from 20k wafers/month at end-2026 to 70k wafers/month at end-2027 — well above prior expectations.
TSMC and Amkor are projected at 180k and 20k wafers/month respectively. In plain terms = ASE is tripling-plus its capacity in a single year, moving from a "supplementary role" to a genuine second source.
TSMC's advanced packaging revenue is expected to sustain a roughly 50% CAGR from 2026 to 2030; its back-end business share of total revenue will rise from about 12% in 2026 to roughly 16% in 2027.
Beyond 2028 — will capacity be enough?
UBS notes that even with Intel's EMIB-T and TSMC's CoPoS entering production for large AI accelerator packaging in 2028–2029, current visibility still points to a need for further CoWoS capacity expansion in 2028.
This means → the benefit window for advanced packaging equipment suppliers may stretch longer than the market expects — not a one- or two-year demand pulse, but a multi-year expansion cycle.
In plain terms = the next-generation technologies are not yet ready to take over, so the current production lines must keep expanding — and the companies selling the equipment get to earn for years to come.
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